TSMC Pushes Back on Reports of Nvidia-Driven 3D DRAM Venture

Taiwan Semiconductor Manufacturing Company has rejected claims that it is developing three-dimensional DRAM production capabilities following pressure from Nvidia, according to a statement provided to Tom's Hardware. The denial comes after The Information reported that the chipmaker had begun preliminary work on such a project to help ease acute memory constraints affecting the artificial intelligence hardware sector.

A company representative emphasized TSMC's strategic focus, stating: "Please note that TSMC focuses on our core business at all times, which is dedicated IC foundry. Our mission is to be the trusted technology and capacity provider of the global logic IC industry for years to come."

Yet sources speaking with The Information paint a different picture. Two individuals with knowledge of the project indicated that TSMC has indeed begun laying groundwork for 3D DRAM manufacturing following a directive from Nvidia, its most significant customer. Leadership of this initiative falls to Hsu Kuo-chin, a TSMC vice president overseeing advanced packaging who previously headed Micron's operations in Taiwan. The undertaking reflects the severity of memory constraints that have transformed DRAM from a commodity product into a critical bottleneck determining whether companies can fulfill customer orders.

The Technical and Business Challenges

TSMC's existing relationship with memory suppliers involves packaging memory into system-in-packages for customers, but the company lacks both the technical expertise and manufacturing infrastructure required for DRAM production, particularly at the three-dimensional level. Furthermore, even among established memory manufacturers, 3D DRAM remains years away from commercial viability, meaning such an effort could not address current shortages for at least half a decade.

Three-dimensional DRAM differs fundamentally from conventional memory by stacking multiple layers of memory cells vertically rather than arranging them in a single plane, thereby increasing capacity per wafer. The three dominant DRAM suppliers—Micron, Samsung, and SK hynix—are all pursuing 3D DRAM development. Micron alone plans to deploy at least four additional planar DRAM process generations before transitioning to three-dimensional architectures.

While TSMC commands arguably the strongest logic process technologies in the sector, DRAM manufacturing demands entirely separate production methodologies that the company would need to establish from the ground up. Constructing 3D DRAM requires distinct fabrication approaches to build multiple memory-cell layers while managing defects and sustaining acceptable production yields. Developing a competitive 3D DRAM process without first establishing a leading-edge planar DRAM capability presents an enormous hurdle, and TSMC currently possesses neither.

Potential Pathways and Market Risks

One conceivable route into DRAM manufacturing would involve acquiring a smaller memory specialist with existing fabrication assets. Such a transaction could provide TSMC a credible entry point into advanced DRAM production without requiring development of underlying memory technology and intellectual property from scratch. However, smaller manufacturers lack cutting-edge commodity DRAM nodes, so TSMC would still face billions of dollars in expenditure and years of research and development to build a competitive leading-edge process.

Entering memory manufacturing would expose TSMC to substantial cyclical risks inherent to the sector. Memory shortages frequently trigger capacity expansions that subsequently generate oversupply, compressing prices and margins. Such volatility could reasonably give TSMC pause before committing to the DRAM business. Additionally, moving into memory production could strain TSMC's relationships with major DRAM manufacturers, particularly SK hynix, which partnered with the foundry in 2024 to produce logic base dies for next-generation HBM products.

A TSMC entry into DRAM manufacturing could also trigger antitrust scrutiny, especially if the company leveraged its dominance in leading-edge logic manufacturing alongside its leading position in advanced chip packaging and expanding memory output. Regulators might investigate whether such vertical integration would allow TSMC to favor its own memory products or disadvantage competitors lacking comparable integration. Conversely, in-house DRAM development could strengthen competition by introducing a fourth supplier into a market presently controlled by three manufacturers.

Alternative Strategies

TSMC need not manufacture DRAM itself to capture expanding value from advanced memory markets. The company could instead increase its share of value generated by DRAM through producing sophisticated logic base dies for HBM, combining memory with processors using its SoIC hybrid bonding technology, and developing specialized memory solutions alongside partners including GUC and established DRAM manufacturers. This approach would permit TSMC to deepen its footprint in the advanced memory sector without committing billions to developing competitive DRAM process technologies independently or constructing additional fabrication plants costing tens of billions of dollars.