GAAFET vs FinFET: Gate-All-Around Explained

A FinFET wraps its gate around three sides of a tall, thin silicon fin. A gate-all-around (GAA) transistor, called GAAFET, nanosheet or ribbon transistor depending on the vendor, wraps the gate around all four sides of the channel. The extra coverage gives the gate tighter control over current, which cuts leakage and lets designers shrink transistors further than fins allow.

As of October 2026, GAA is in production at all three leading-edge chipmakers: Samsung (since 2022), TSMC (N2) and Intel (18A). This guide explains the structure, the vendor names and what comes after nanosheets.

Why transistor shape matters

A transistor is a switch. A gate electrode sits over a channel and decides whether current flows between source and drain. As transistors shrink, the gate loses grip on the channel and current leaks through even when the switch is "off". Leakage wastes power and generates heat, so every new structure is a way to give the gate more contact with the channel.

From planar to FinFET to GAA

Planar transistors

For decades the channel was a flat strip under a flat gate. The gate touched only the top surface, so as the channel got shorter, the drain started to influence it more than the gate did.

FinFET

Intel announced its 3D Tri-Gate transistor in May 2011 and said it would first appear in high-volume Ivy Bridge chips on a 22 nm process; see this report on the announcement. The channel became a vertical fin, and the gate covered the top and both sides. Fin-based transistors, generally called FinFETs, were later adopted across the industry.

Fins carried the industry through many nodes. Their limit is that drive current is set by fin count and fin height, and fins can only be made so thin and so tall before they become unstable or hard to pattern. Gate control also weakens as fins are narrowed further.

Gate-all-around nanosheets

In a nanosheet GAA transistor, the fin is replaced by one or more thin horizontal sheets of silicon stacked on top of each other. The gate material fills the gaps and wraps every sheet on all sides. TSMC describes its N2 as first-generation nanosheet transistor technology.

Two practical advantages follow:

Better electrostatic control. The gate surrounds the channel, so it keeps leakage lower at short channel lengths.
Tunable width. Designers can change the width of the sheets. Wider sheets favour performance, narrower ones favour lower power. A FinFET can only add whole fins, so its drive strength comes in steps.

GAAFET, nanosheet, MBCFET, RibbonFET: same idea, different names

"GAAFET" describes the family. Within it, nanowires use thin round channels and nanosheets use wide flat ones. The commercial chips so far use nanosheets, and each company brands its version.

Samsung MBCFET (Multi-Bridge-Channel FET). Samsung announced on June 30, 2022 that it had started production of 3 nm chips with GAA; Samsung's announcement names the transistor MBCFET (Multi-Bridge-Channel FET), a nanosheet design. Samsung was the first to ship GAA, while TSMC still used FinFETs at 3 nm.
TSMC nanosheet (N2). TSMC states that N2 started volume production in the fourth quarter of 2025. It is TSMC's first node with GAA. For the wider roadmap see our guide to TSMC process nodes from N3 to A14.
Intel RibbonFET (18A). Intel pairs RibbonFET with PowerVia backside power on its 18A process. The first products were the Core Ultra Series 3 "Panther Lake" laptop chips, which launched at CES 2026 with general availability in late January 2026.

The names differ, but the core idea is the same: stacked silicon sheets with a gate wrapped around each one.

FinFET vs GAAFET at a glance

Channel shape: FinFET uses a vertical fin; GAA uses stacked horizontal sheets or wires.
Gate contact: three sides for FinFET; four sides for GAA.
Drive current tuning: FinFET in whole-fin steps; GAA by sheet width and sheet count.
Manufacturing: GAA needs a stack of alternating silicon and sacrificial layers, a precise etch to release the sheets and gate material deposited in very small gaps. That is harder than fin patterning.
Where it ships: FinFET remains common on mature and mid-range nodes; GAA is used on the leading edge.

GAA does not shrink a chip on its own. Density gains also depend on lithography, wiring and, increasingly, power delivery. For the tool side, see our explainer on High-NA EUV vs EUV.

What comes after nanosheets

Research group imec, which works with the major chipmakers, describes a path from FinFET to nanosheet, then forksheet and then CFET. These are projections, not product commitments.

Forksheet. A nanosheet variant where a dielectric wall separates the n-type and p-type transistors. Reducing that spacing allows wider effective channels and shorter standard cells.
CFET (complementary FET). The n-type and p-type devices are stacked vertically instead of placed side by side, which removes the spacing between them from cell height. Imec has favoured the monolithic route, where both devices are built in one process flow.

Imec places CFET for nodes beyond 1 nm. Whether and when any manufacturer adopts forksheet or CFET depends on cost and yield, and none has announced a production date as of October 2026 in the sources checked for this article. Papers at conferences such as IEDM are the best place to watch for progress.

For more coverage of fabs and process technology, browse our Chips section or the wider Industry desk.

Frequently asked questions

What is the difference between GAAFET and FinFET?

A FinFET gate touches the channel on three sides, while a GAAFET gate surrounds it on all four. That tighter control reduces leakage at small sizes and allows adjustable channel width.

Is GAA better than FinFET?

At the smallest nodes, yes, because FinFETs lose gate control as they shrink. GAA is also costlier and harder to make, which is why FinFETs remain in use on older and cheaper nodes.

Who made the first gate-all-around chip?

Samsung announced production of 3 nm GAA chips on June 30, 2022, the first from a major foundry to do so. TSMC followed with N2 in late 2025, and Intel with 18A products in early 2026.

What is the difference between nanosheet and nanowire transistors?

Both are GAA designs. Nanowires have thin, narrow channels, while nanosheets are wider and flatter, which gives more current per stack. Current leading-edge products use nanosheets.

What comes after GAA transistors?

Imec's roadmap points to forksheet and then CFET, which stacks n-type and p-type devices vertically. These remain research-stage as of October 2026.