High-NA EUV vs EUV: What 0.55 NA Lithography Changes

High-NA EUV is the newest generation of extreme ultraviolet lithography. It uses the same 13.5 nm light as standard EUV but raises the numerical aperture (NA) of the optics from 0.33 to 0.55, which improves resolution from 13 nm to 8 nm. ASML, which builds the scanners, says this lets chipmakers print features 1.7 times smaller in a single exposure and reach transistor densities 2.9 times higher.

The trade-offs are a half-size exposure field and new optics, masks and processes. As of October 2026, Intel already uses High-NA on selected layers of its 18A chips in volume production, SK hynix has installed a system for DRAM, Samsung plans to adopt it for future DRAM, and TSMC says it will use it in high-volume manufacturing from 2030.

Why numerical aperture matters

Lithography resolution follows the Rayleigh criterion, which ASML writes as CD = k1 × λ / NA (ASML). CD, the critical dimension, is the smallest feature that can be printed; λ is the wavelength of the light; NA describes how much light the optics can collect; and k1 is a process factor with a physical limit of 0.25.

There are two ways to print smaller features: shorter wavelengths, which require a new light source, or a larger NA, which requires bigger optics. The move from deep ultraviolet to EUV was a wavelength change. High-NA keeps 13.5 nm light and enlarges the optics instead.

Standard EUV vs High-NA EUV: the numbers

ASML's EUV product pages list these specifications:

• TWINSCAN NXE:3800E (standard EUV): 0.33 NA, 13 nm resolution, at least 220 wafers per hour at a dose of 30 mJ/cm². ASML positions it for 2 nm logic and leading-edge DRAM.
• TWINSCAN EXE:5000 (first High-NA system): 0.55 NA, 8 nm resolution, at least 110 wafers per hour at 50 mJ/cm².
• TWINSCAN EXE:5200B (High-NA for volume production): 0.55 NA, 8 nm resolution, at least 175 wafers per hour at 50 mJ/cm², aimed at sub-2 nm logic and leading-edge DRAM (ASML).

The throughput figures are quoted at different doses, so they do not compare one to one. ASML also says High-NA delivers 40% more imaging contrast than its NXE systems, which reduces patterning defects and lets chipmakers use a lower dose per exposure.

Anamorphic optics and the half-size field

To reach 0.55 NA while keeping today's photomask size, ASML designed anamorphic optics that shrink the image by different amounts in each direction: four times along one axis and eight times along the other. The cost is a smaller field. ASML says the exposure field is half the size of that in its 0.33 NA systems (ASML): 26 mm by 16.5 mm instead of 26 mm by 33 mm (overview). To keep output up, the EXE platform has faster wafer and reticle stages.

Chips larger than the half field must be exposed in two parts and stitched together, which matters for large AI and server processors. In September 2026 ASML and TSMC launched an industry initiative to move to 12-inch photomasks, aiming for a mask pilot line by 2031 and 12-inch High-NA systems in advanced-node production by 2033. They say the larger masks would raise scanner productivity, lower costs and remove stitching constraints (TSMC).

Why chipmakers want it

The smallest features on leading chips are often printed in several exposures, a technique called multi-patterning, because a single exposure cannot resolve them. Each extra exposure adds process steps, cycle time and cost. ASML's case for High-NA is that single exposures can replace some of that multi-patterning, which reduces process complexity and raises wafer output in the fab. A lower dose also shortens the time needed to print each layer.

Who uses High-NA EUV, as of October 2026

• Intel installed the first commercial High-NA system, a 165-ton EXE:5000, at its D1X fab in Hillsboro, Oregon, in April 2024 (Intel). In July 2026 ASML said Intel Foundry had entered high-volume manufacturing of some Core Ultra Series 3 (Panther Lake) processors with specific Intel 18A layers patterned on High-NA in Oregon, at yields matched to standard EUV, making Intel the first to ship high-volume logic made with the technology. Intel was also the first to install and pass acceptance testing of the EXE:5200B (ASML). Its next node, 14A, was planned around High-NA with risk production in 2027, according to Intel's April 2025 roadmap (Tom's Hardware), and in September 2026 Intel Foundry and ASML announced a collaboration to prepare the wider industry for High-NA (ASML).
• SK hynix installed an EXE:5200B at its M16 fab in Icheon, South Korea, in September 2025, calling it the industry's first High-NA system for mass production. It is meant for next-generation DRAM (SK hynix).
• Samsung said in September 2026 that it plans to adopt High-NA for future DRAM manufacturing and that it has joined the 12-inch photomask initiative (ASML).
• TSMC said in September 2026 that it intends to use High-NA in high-volume manufacturing for advanced nodes starting in 2030, first with current 6-inch masks, and that the number of layers needing High-NA will rise as transistor designs grow more complex (TSMC).

High-NA for memory as well as logic

High-NA is not only a logic technology. ASML aims the EXE:5200B at both sub-2 nm logic nodes and leading-edge DRAM, and says the EXE platform will support logic first, starting at the 2 nm node, followed by memory at a similar transistor density. SK hynix has used standard EUV in DRAM production since 2021, starting with its 1a nm process, the fourth generation of its 10 nm-class technology. It says the High-NA system at M16 is meant to simplify its existing EUV process and speed up development of next-generation memory, where a smaller pattern means more chips per wafer and better power efficiency.

We follow these node and fab decisions in our Chips section, with company strategy covered under Industry.

Limits and open problems

A higher NA reduces depth of focus, which pushes chipmakers toward thinner photoresist layers. Thinner resists absorb fewer photons, which makes random, or stochastic, defects harder to control. EUV optics also focus horizontal and vertical mask features differently, so identical lines can print at different sizes depending on their orientation (overview). Adoption is therefore gradual: Intel uses High-NA on selected 18A layers, and TSMC expects the number of layers that need it to rise as transistor designs grow more complex.

After High-NA: Hyper-NA

ASML has put a further step on its long-term roadmap: Hyper-NA, with an NA of 0.75, shown for around 2030 in a 2024 presentation by its former president Martin van den Brink. ASML told EE Times at the time that feasibility studies were ongoing (EE Times).

Frequently asked questions

What is High-NA EUV?

High-NA EUV is extreme ultraviolet lithography with optics of 0.55 numerical aperture instead of 0.33. It keeps 13.5 nm light and improves resolution from 13 nm to 8 nm.

What is the difference between High-NA EUV and standard EUV?

High-NA uses larger anamorphic optics with 0.55 NA, prints 8 nm features versus 13 nm and exposes a field half the size. ASML says it allows features 1.7 times smaller in one exposure.

Does TSMC use High-NA EUV?

Not yet in volume production. TSMC said in September 2026 that it intends to use High-NA in high-volume manufacturing for advanced nodes starting in 2030, initially with today's 6-inch masks.

Which companies have High-NA EUV machines?

Intel installed the first commercial system in Oregon in April 2024 and now uses High-NA on selected Intel 18A layers in volume production. SK hynix installed one for DRAM mass production in Icheon in September 2025, and Samsung said in September 2026 that it plans to adopt High-NA for future DRAM.

What is the resolution of High-NA EUV?

ASML rates its High-NA systems, the EXE:5000 and EXE:5200B, at 8 nm resolution, compared with 13 nm for its 0.33 NA systems.