AMD releases detailed Venice benchmarks, claims significant advantages over Nvidia Vera
AMD has published a white paper with extensive performance data for its EPYC Venice server processors, asserting that its 256-core flagship substantially outpaces Nvidia's Vera architecture across multiple workload categories.

AMD unveiled comprehensive benchmark results for its EPYC Venice server processors on Friday, following the chips' July debut. The company maintains its assertion that a 96-core, high-frequency Venice variant delivers roughly 20% better performance than Nvidia's 88-core Vera in SPEC CPU 2026's Integer Rate test, and has now released a detailed white paper expanding on these claims with additional performance data.

The white paper reveals varying configurations across different benchmarks, and AMD draws performance data from multiple sources using different versions of the GNU Compiler Collection (GCC). These methodological differences warrant caution when interpreting the results, as compiler versions can substantially influence performance outcomes.

SPEC CPU 2026 results
In SPEC CPU 2026 intrate testing, which measures total throughput by running multiple application copies on the same processor, AMD's 256-core 9996 achieved 2.37x the performance of Intel's Xeon 6980P and 2.24x that of Vera. The results were compiled in July using GCC 15.2. Particularly noteworthy is the generational comparison: the 9996 runs approximately 78% faster than the previous-generation 192-core EPYC 9965.
However, configuration differences complicate direct comparisons. AMD tested a down-cored version of the 9996, reducing it from 256 cores to 96 cores for the Vera comparison. While AMD allocated a 600W power budget for this test, the company's standard 96-core, high-frequency Venice SKU has a maximum power draw of 500W. More significantly, AMD employed GCC 16.1 for its testing while Nvidia used GCC 15.2 in its Vera white paper. This compiler version mismatch represents a departure from standard benchmarking practices, as different GCC versions produce measurably different results due to varying optimization strategies.

Memory bandwidth and cloud workloads
AMD presented Stream benchmark results, an industry-standard memory bandwidth measurement, using data from Phoronix's initial Vera testing. The down-cored 9996 with a 600W power budget achieved approximately 18% higher throughput than Vera, with per-core performance about 8% ahead. This represents a notable reversal from Phoronix's original testing, where Vera dominated the competition.
In cloud workloads spanning database, Java, and cryptography applications, Venice extends AMD's existing advantage from the previous generation. AMD conducted these tests internally rather than relying on third-party data, though AWS cloud instance results for Graviton5 came from external sources.

HPC and AI workload performance

For high-performance computing workloads, Venice increases AMD's margin over Intel's flagship Granite Rapids-AP processor. Intel's next-generation data center CPUs, codenamed Diamond Rapids, are scheduled for release in the coming year.

AMD also demonstrated performance in what it terms "agentic AI workload performance," utilizing NGINX, TPCx-AI kit, FAISS, TPC-H, TPC-C, and a multi-persona agent replay. For TPC-H and TPC-C, AMD derived custom workloads from these benchmarks, meaning the results cannot be directly compared to published benchmark scores.

Real-world deployment considerations
While benchmark results provide useful performance indicators, they offer limited insight into actual server deployment scenarios at the scale AMD targets. Peak performance represents only one factor in server deployment decisions, and real-world performance varies significantly depending on the specific software running and how it has been compiled.
Venice demonstrates strong performance, particularly in generational comparisons against its predecessor. Whether this momentum extends to AMD's upcoming Zen 6 consumer desktop rollout remains to be seen pending additional disclosures from the company.